The present invention relates to a liquid crystal display device, and in particular to an active matrix type liquid crystal display device.
Among the active matrix type liquid crystal display devices, a so-called in-plane switching type (or a so-called horizontal electric field type) liquid crystal display device, for example, has a pair of opposing transparent substrates, a liquid crystal layer sandwiched between the substrates, and a plurality of pixel areas formed on a surface of one of the substrates on a liquid crystal layer side thereof each having a pixel electrode and a counter electrode configured so as to generate therebetween electric fields having components parallel with the major surfaces of the substrates.
While the counter electrode is supplied with a voltage signal serving as a reference voltage, the pixel electrode is supplied with a video signal from a drain signal line via a thin film transistor driven by a scanning signal from a gate signal line.
In each pixel area, a holding capacitance Cstg is formed between the counter electrode and the pixel electrode such that the video signal is stored in the pixel electrode after the thin film transistor is turned OFF.
For example, each pixel area is disposed in an area surrounded by two adjacent ones of a plurality of gate signal lines (or a plurality of counter-voltage signal lines) each extending in the x-axis direction and arranged in the y-axis direction in a system of rectangular co-ordinates and two adjacent ones of a plurality of drain signal lines each extending in the y-axis direction and arranged in the x-axis direction.
In the liquid crystal display device having such a configuration, however, when writing of a signal into a pixel electrode is completed via a thin film transistor, a potential of a source side of the thin film transistor connected to the pixel electrode is shifted toward a lower potential due to a capacitive coupling by a capacitance Cgs between the source and a gate of the thin film transistor. Noise which causes such an unwanted shift of a potential or a voltage will be hereinafter referred to as a disturbance voltage.
A potential of the counter electrode is also shifted toward a lower potential due to a capacitive coupling by a capacitance Cgc between a gate signal line connected to the gate of the thin film transistor and the counter electrode (or a counter-voltage signal line), and therefore, if a delay time constant of the counter-voltage signal is large, the potential of the counter electrode is shifted toward a lower potential and varies the potential of the source via the holding capacitance Cstg.
If a distortion occurs in a scanning signal (pulse) due to a delay caused by resistance, capacitance and the like of the gate signal line, the thin film transistor is brought into a half-ON state when selection of the gate is completed, therefore a disturbance voltage is superimposed upon a useful signal, as a result, an apparent magnitude of the disturbance voltage is made smaller and the potential of the source side of the thin film transistor is shifted toward a higher potential after the writing of the signal is completed.
Therefore the amount of a shift of the potential varies according to the amount of the delay by the gate signal lines, and consequently, the brightness of the display area becomes non-uniform (graded).
The optimum potential of the counter electrode varies with position in the display area and this variation causes flicker, image retention and the like.
Further, the potential of the counter electrode is shifted toward a lower potential according to the amount of the delay caused by resistance, capacitance and the like of the counter-voltage signal line when selection of the gate is completed, as a result the potential of the source side of the thin film transistor becomes instable and this instability causes a graded brightness distribution, flicker, smears, image retention, and the like.
This invention was made based upon the above situation, and it is an object of the present invention to provide a liquid crystal display device having stabilized pixel electrode potentials irrespective of the amount of signal delays in the gate signal lines and the like.
The following explains representative ones of the inventions disclosed in this specification briefly.
In accordance with an embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing substrates; a liquid crystal layer sandwiched between the pair of opposing substrates; a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of the pair of opposing substrates; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween; and a plurality of pixels each having a switching element and disposed in an area surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of drain signal lines, each of the plurality of pixels being configured such that video information supplied from a corresponding one of the plurality of drain signal lines is written thereinto via the switching element driven by a first scanning signal from a corresponding one of the plurality of gate signal lines, wherein a second scanning signal from one of the plurality of gate signal lines succeeding the corresponding one of the plurality of gate signal lines rises approximately simultaneously with fall of the first scanning signal such that disturbances introduced into one of the plurality of pixels by the first scanning signal and the second scanning signal cancel each other.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing substrates; a liquid crystal layer sandwiched between the pair of opposing substrates; a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of the pair of opposing substrates; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween; and a plurality of pixel areas each having a pixel electrode and a switching element, and surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of drain signal lines, the pixel electrode being supplied with a video signal from a corresponding one of the plurality of drain signal lines via the switching element driven by a scanning signal supplied from a corresponding one of the plurality of gate signal lines, wherein a capacitance formed between the pixel electrode and the corresponding one of the plurality of gate signal lines is approximately equal to a capacitance formed between the pixel electrode and one of the plurality of gate signal lines succeeding the corresponding one of the plurality of gate signal lines.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing first and second substrates; a liquid crystal layer sandwiched between the pair of opposing first and second substrates; a plurality of gate signal lines disposed on a surface of the first substrate on a liquid crystal layer side thereof; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween on the surface of the first substrate; and a plurality of pixel areas each having a pixel electrode and a switching element, and arranged in a matrix fashion surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of drain signal lines, the pixel electrode being supplied with a video signal from a corresponding one of the plurality of drain signal lines via the switching element driven by a scanning signal supplied from a corresponding one of the plurality of gate signal lines, wherein a following inequality is satisfied:
(xc2xd)Cgsxe2x88x92sxe2x89xa6Cgsxe2x88x92nxe2x89xa62Cgsxe2x88x92s,
where Cgsxe2x88x92s is a capacitance between the pixel electrode and the corresponding one of the plurality of gate signal lines, and Cgsxe2x88x92n is a capacitance between the pixel electrode and one of the plurality of gate signal lines succeeding the corresponding one of the plurality of gate signal lines.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing substrates; a liquid crystal layer sandwiched between the pair of opposing substrates; a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of the pair of opposing substrates; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween; and a plurality of pixel areas each having a pixel electrode, a counter electrode adjacent to the pixel electrode and a switching element, and surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of drain signal lines, the pixel electrode and the counter electrode being arranged so as to generate therebetween an electric field having a component parallel to the surface of the one of the pair of opposing substrates, the pixel electrode being supplied with a video signal from a corresponding one of the plurality of drain signal lines via the switching element driven by a scanning signal supplied from a corresponding one of the plurality of gate signal lines, wherein a capacitance formed between the pixel electrode and the corresponding one of the plurality of gate signal lines is approximately equal to a capacitance formed between the pixel electrode and one of the plurality of gate signal lines succeeding the corresponding one of the plurality of gate signal lines, and a capacitance formed between the counter electrode and the corresponding one of the plurality of gate signal lines is approximately equal to a capacitance formed between the counter electrode and one of the plurality of gate signal lines succeeding the corresponding one of the plurality of gate signal lines.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing first and second substrates; a liquid crystal layer sandwiched between the pair of opposing first and second substrates; a plurality of gate signal lines disposed on a liquid crystal layer side surface of the first substrate; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween; and a plurality of pixel areas each having a pixel electrode, a counter electrode adjacent to the pixel electrode and a switching element, and arranged in a matrix fashion surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of drain signal lines, the pixel electrode being supplied with a video signal from a corresponding one of the plurality of drain signal lines via the switching element driven by a scanning signal supplied from a corresponding one of the plurality of gate signal lines, the pixel electrode and the counter electrode being arranged so as to generate therebetween an electric field having a component parallel to the surface of the first substrate, wherein following inequalities are satisfied:
(xc2xd)Cgsxe2x88x92sxe2x89xa6Cgsxe2x88x92nxe2x89xa62Cgsxe2x88x92s,
and
(xc2xd)Cgcxe2x88x92sxe2x89xa6Cgcxe2x88x92nxe2x89xa62Cgcxe2x88x92s,
where Cgsxe2x88x92s is a capacitance formed between the pixel electrode and the corresponding one of the plurality of gate signal lines, Cgsxe2x88x92n is a capacitance formed between the pixel electrode and one of the plurality of gate signal lines succeeding the corresponding one of the plurality of gate signal lines, Cgcxe2x88x92s is a capacitance formed between the counter electrode and the corresponding one of the plurality of gate signal lines, and Cgcxe2x88x92n is a capacitance formed between the counter electrode and one of the plurality of gate signal lines succeeding the corresponding one of the plurality of gate signal lines.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing substrates; a liquid crystal layer sandwiched between the pair of opposing substrates; a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of the pair of opposing substrates; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween; and a plurality of pixel areas each having a pixel electrode and a switching element, and surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of drain signal lines, the pixel electrode being configured so as to hold a video signal written thereinto from a corresponding one of the plurality of drain signal lines via the switching element driven by a scanning signal supplied from a corresponding one of the plurality of gate signal lines, wherein a following inequality is satisfied:
|Vhb|xe2x89xa6|Vha|,
where Vw is a voltage for writing the video signal into the pixel electrode when the scanning signal is applied to the corresponding one of the plurality of gate signal lines, Vh1 is a hold voltage held on the pixel electrode when a second scanning signal is applied to one of the plurality of gate signal lines succeeding the corresponding one of the plurality of gate signal lines, Vh2 is a hold voltage held on the pixel electrode after an end of the second scanning signal, |Vhb| is an absolute difference between Vw and Vh1, and |Vha| is an absolute difference between Vw and Vh2.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing substrates; a liquid crystal layer sandwiched between the pair of opposing substrates; a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of the pair of opposing substrates; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween; and a plurality of pixel areas each having a pixel electrode and a thin film transistor, and surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of drain signal lines, the pixel electrode being supplied with a voltage Vs of a source electrode of the thin film transistor receiving the drain electrode voltage Vd from a corresponding one of the plurality of drain signal lines, the thin film transistor being driven by rise of a signal supplied from a corresponding one of the plurality of gate signal lines, wherein Vso is in a range of Vdxc2x1Vds, where Vso=a voltage of the source electrode during a rising period of a second signal on one of the plurality of gate signal lines succeeding the corresponding one of gate signal lines, and Vds=a difference between the drain electrode voltage Vd and a voltage Vs1 of the source electrode after the second signal is turned off.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing substrates; a liquid crystal layer sandwiched between the pair of opposing substrates; a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of the pair of opposing substrates; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween; and a plurality of pixel areas each having a pixel electrode and a switching element, and surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of drain signal lines, the pixel electrode being supplied with a signal from a corresponding one of the plurality of drain signal lines via the switching element to be turned ON by a signal supplied from a corresponding one of the plurality of gate signal lines, wherein a following inequality is satisfied: Variation 1 less than Variation 2, where Variation 1=a difference between a voltage supplied to the pixel electrode when the switching element is ON and a voltage on the pixel electrode when a second signal is supplied to one of the plurality of gate signal lines succeeding the corresponding one of the plurality of gate signal lines, and Variation 2=a difference between the voltage supplied to the electrode when the switching element is ON and a voltage on the pixel electrode after an end of the second signal.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing substrates; a liquid crystal layer sandwiched between the pair of opposing substrates; a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of the pair of opposing substrates; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween; and a plurality of pixel areas each having a pixel electrode, a counter electrode adjacent to the pixel electrode and a switching element, and surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of of drain signal lines, the pixel electrode and the counter electrode being arranged so as to generate therebetween an electric field having a component parallel to the surface of the one of the pair of opposing substrates, the pixel electrode being supplied with a video signal from a corresponding one of the plurality of drain signal lines via the switching element driven by a scanning signal supplied from a corresponding one of the plurality of gate signal lines, and an insulating layer is interposed between the at least one of the pixel electrodes and the one of the plurality of gate signal lines at the portion, and the pair of first and second counter-voltage signal lines are connected to end of the counter electrode wherein the first counter-voltage signal line and the pixel electrode form a first holding capacitance Cstg1 therebetween, the second counter-voltage signal line and the pixel electrode form a second holding capacitance Cstg2 therebetween, and the pixel electrode and the second one of the plurality of gate signal lines form a capacitance Cadd therebetween, and wherein following inequalities are satisfied:
(xc2xd)Cgsxe2x88x92sxe2x89xa6Cgsxe2x88x92nxe2x89xa62CGSxe2x88x92s,
Cadd less than Cstg1, and Cadd less than Cstg2, where Cgsxe2x88x92s is a capacitance between the pixel electrode and the corresponding one of the plurality of gate signal lines, and Cgsxe2x88x92n is a capacitance between the pixel electrode and the second one of the plurality of gate signal lines, respectively.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing substrates; a liquid crystal layer sandwiched between the pair of opposing substrates; a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of the pair of opposing substrates; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween; and a plurality of pixel areas each having a pixel electrode, a counter electrode adjacent to the pixel electrode and a switching element, and surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of drain signal lines, the pixel electrode and the counter electrode being arranged so as to generate therebetween an electric field having a component parallel to the surface of the one of the pair of opposing substrates, the pixel electrode being supplied with a video signal from a corresponding one of the plurality of drain signal lines via the switching element driven by a scanning signal supplied from a corresponding one of the plurality of gate signal lines, wherein at least one of the pixel electrodes has a portion overlying one of the plurality of gate signal lines succeeding the corresponding one of the plurality of gate signal lines, and an insulating layer is interposed between the at least one of the pixel electrodes and the one of the plurality of gate signal lines at the portion, and each of the pixel electrode and the counter electrode has one bend or an odd number of bends more than one.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing substrates; a liquid crystal layer sandwiched between the pair of opposing substrates; a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of the pair of opposing substrates; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween; and a plurality of pixels each having a pixel electrode, a counter electrode adjacent to the pixel electrode and a switching element, and surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of drain signal lines, the pixel electrode and the counter electrode being arranged so as to generate therebetween an electric field having a component parallel to the surface of the one of the pair of opposing substrates, the pixel electrode being supplied with a video signal from a corresponding one of the plurality of drain signal lines via the switching element driven by a scanning signal supplied from a corresponding one of the plurality of gate signal lines, wherein each of the pixel electrode and the counter electrode has a bend, each of the plurality of drain signal lines has a bend within each of the plurality of pixels, and at least one of the pixel electrodes has a portion overlying one of the plurality of gate signal lines succeeding the corresponding one of the plurality of gate signal lines, and an insulating layer is interposed between the at least one of the pixel electrodes and the one of the plurality of gate signal lines at the portion.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing substrates; a liquid crystal layer sandwiched between the pair of opposing substrates; a plurality of scanning signal lines disposed on a liquid crystal layer side surface of one of the pair of opposing substrates; a plurality of video signal lines disposed to intersect the plurality of scanning signal lines with an insulating layer interposed therebetween; and a plurality of pixel areas each having a pixel electrode and a thin film transistor, and surrounded by two adjacent ones of the plurality of scanning signal lines and two adjacent ones of the plurality of video signal lines, a source electrode of the thin film transistor being connected to the pixel electrode, a drain electrode of the thin film transistor being connected to a corresponding one of the plurality of video signal lines, a gate electrode of the thin film transistor being connected to a corresponding one of the plurality of scanning signal lines, wherein a following inequality is satisfied:
(xc2xd) Area A less than Area C less than 2 Area A,
where the Area A is an area of a region A of the corresponding one of the plurality of scanning signal lines being overlaid with the source electrode, the Area B is an area of a region B of the corresponding one of the plurality of scanning signal lines being overlaid with the drain electrode, and the Area C is an area of a region C of the corresponding one of the plurality of scanning signal lines being overlaid with a pixel electrode corresponding to one of the plurality of scanning signal lines preceding the corresponding one of the plurality of scanning signal lines, the region A, the region B and the region C being spaced from one another.
In a liquid crystal display device having the above configuration, video signals from the drain signal lines are written into pixel electrodes via switching elements corresponding to one gate signal line, and immediately after writing of the video signals is completed, simultaneously with fall of a scanning signal applied to the one gate signal line, a scanning signal applied to another gate signal line succeeding the one gate signal line rises and disturbance voltages introduced into the pixels by the two scanning signals cancel each other.
As a result, the potentials of the pixel electrodes are stabilized irrespective of the amount of signal delays in the gate signal lines and the like.